CHIP AND WAFER MAKING SERVICES

Our enterprise possesses modern equipment for optical lithography with wavelengths of up to 365 nm. Our technological capabilities in the field of lithography:

• Applying photoresist by spin- and spray coating
• Applying passivating materials by using the spin coating
• Projection lithography 365 nm (only wafers with a diameter of 150 mm)
• Contact lithography: broadband, 365 nm; various alignment methods: front side to front side (F2F), front to backside (F2B), infrared

We can perform processes of bonding semiconductor wafers with each other by using various methods on the equipment manufactured by EVG, as well as on specially designed machines. This service is available for both 100 mm and 150 mm wafers. Semiconductors of different natures, glass, and polymers are treated in different chambers if they are exposed to heating up to the temperature above 150°C. Before bonding, the wafers may be optically combined, which enables to create complex three-dimensional assemblies. Available technologies are given below:

• Hydrophilic fusion bonding: SiO₂/Si, SiO₂/SiO₂
• Plasma activated hydrophilic fusion bonding
• UHV hydrophobic bonding: Si/Si, Si/3-5 compounds, Al/Al
• Anodic bonding: Si/glass
• Glass frit bonding
• Metal bonding: Au-Si, Au-Sn, Pb-Sn eutectics
• Polymer bonding: photoresist, BCB

We have several machines at our disposal to carry out the PVD process, which will enable us to form thin films by using all physical deposition methods available.

We continuously maintain the warehouse stock of high-purity metals for PVD, which enables us to form films from almost any metal used in microtechnologies:

• Magnetron sputtering: Ti, TiN, Al, Cu, Au
• Thermal vacuum evaporation: V, Cr
• Electron-beam evaporation: V, Cr, Ti, Cu, Al, W, Fe, Ni, Co, Zr, Mo, Au, Ag, Pt, Pd, Ru, Ir
• The above metals do not represent an exhaustive list of metals suitable for use. Please contact us to discuss the options to form thin films of metals or alloys needed by you.

We had successfully implemented the technology of atomic layer deposition of metals and dielectrics, which enables us to fill in cavities with the depth of up to 500 μm with the aspect ratio of 1:10. Therefore, we can form vacuum contacts to high-precision sensible MEMS elements, and create leads with minimum specific resistance for 3D integrated systems. We are currently ready to offer the following processes to our customers:

• ALD of dielectrics: Al₂O₃, Si₃N₄, SiO₂, HfO₂
• ALD of metals: Ir, Ru, Cu

We carry out oxidation of silicon with thicknesses from 50 nm to 4 μm. A wide range of pipes enables us to form the oxide of different thicknesses and carry out oxidation in different modes (wet, dry, with chlorine addition)

We have equipment for the deposition of standard dielectric layers used in silicon technologies. Such process may be implemented by using both LP CVD and PE CVD with different precursor gases. In a number of applications where it is necessary to create coatings for high conformity of step coatings, we use liquid precursors in the form of TEOS. The characteristics of the resulting films are given below:

• LP CVD SiO₂: 0.1-5.0 μm
• LP CVD Si₃N₄: 20-500 nm
• PE CVD SiO₂: 0.1-5.0 μm
• LP CVD Si_xN_y: 0.1-2.5 μm

To make TSV or TGV, and to form solder balls and bumps, we use electroplating of following metals: Cu, Au, Sn, Pb, Ni. Additionally, we actively use the technologies of electroless deposition of thin Ni and Au layers – in particular, on dielectric surfaces. From amongst the reagents used, we did our best to ultimately avoid hazardous cyanides, which makes our industrial base environmentally friendly. In one process, we can form structures Cu/Sn/Ag, Pb/Sn, Au/Sn with precisely controlled compositions and layer thicknesses, which forms the base for creating balls or bumps for flip-chip. In one process, a metal layer with a thickness of up to 100 μm may be formed. Larger thicknesses are available upon request.

We have successfully developed processes for RIE of dielectrics and metals: SiO₂, Si₃N₄, Al₂O₃, Si, Al, Fe, Ni, Co and introduced them into a standard process flow. Thin dielectric films are etched to the depth of 5 μm with lateral size deflection by no more than 0.1 μm. Deep etching of silicon (to the depths of 750 μm) was carried out by using the Bosch process with verticality of +/-0.3°and aspect ratio of 1:12. The aspect ratio may be enlarged up to 1:50 by using cryogenic etching processes. Our company has also unique equipment and knowledge in the field of DRIE of quartz and borosilicate glass, which is used to create ultra-compact microfluidic and 2.5D integrated devices.

We use a wide range of equipment for wet cleaning and etching. Wafers may be etched both in a bench and in individual spray equipment. The equipment used facilitates creating three-dimensional structures in silicon by using the technology of anisotropic etching in KOH. We perform the same process as for CMOS-compatible wafers in TMAH. The treatment equipment is strictly divided by areas by using specially marked containers, which prevents cross contamination of substrates with adverse ions. The complete list of the liquid anisotropic etching processes is given below:

• Isotropic etching of metals: V, Cr, Ti, Cu, Al, W, Fe, Ni, Co, Zr, Mo, Au, Ag
• Isotropic etching of dielectric materials: SiO2, Borofloat 33, Si3N4
• anisotropic etching: Si in KOH and TMAH

We take pride in the processes for etching of silicon and SiO₂ in gas phase, as well as in the processes for cleaning wafers from contaminations in the CO₂ medium. The equipment for gas phase etching of Si and SiO₂ have been developed independently by our company. They enable SiO₂ etching in the HF gas with controlled humidity, as well as Si etching in the XeF₆ medium. These processes enable us to offer a unique possibility of pure dry release for forming moving structures in the manufacture of MEMS for our customers. The cleaning processes in the CO₂ medium enable treatment of especially sensitive microstructures before their encapsulation, providing a high yield.

We possess high-performance equipment for thinning of silicon wafers followed by chemical and mechanical polishing (CMP). The precise process control systems enable us to manufacture 50 μm-thick wafers. In the CMP processes, we obtain such surface roughness as R_a<0.3 nm. These technologies, combined with measuring instruments to monitor the uniformity and thickness, enable us to prepare wafers for manufacturing SOI and 3D integration, and to offer services for reclaim of wafers with already applied technological layers for use as dummy wafers.

For doping in the manufacture of microelectronic products, we use several ion implanters and furnaces for high temperature processes up to 1200°C. We glad to offer for our customers following processes:

• Ion implantation of boron
• Ion implantation of phosphorus
• Ion implantation of arsenic
• Ion implantation of antimony
• Diffusion of boron
• Diffusion of phosphorus
• Diffusion with using planar sources

In contrast to many enterprises specialized in a narrow range of processes, we offer our customers the unique option to use thick-film technologies on semiconductor wafers. Stencil printing facilitates forming films of glass, conductive pastes based on silver and other precious metals, as well as films of highly porous getters for vacuum packaging. In stencil printing, we use both metal stencils and emulsion screens which facilitate forming geometrical patterns from pastes virtually at any level of complexity.

We have special equipment providing thermal processes after printing, which is not utilized in semiconductor industry. This equipment performs processes for paste sintering, glass glazing, and reflow solder. In certain instances, forming of thick glass films may be followed by a process of additional polishing of wafers, which enables us to implement the thick-film anodic bonding technology for MEMS.

For singulation of wafers, the standard technology utilizing the diamond disc and water cooling is predominant in use. However for singulation of small dies or especially sensitive structures, the chemical plasma-based singulation technology is used. For such purpose, the wafer with dies on film is exposed to additional technological operations before being delivered to the customer or tested. Special protective polymers, as well as well-adjusted stable processes, make it possible to achieve high yield.

Due to our advanced wafer bonding equipment, we can provide our customers with SOI wafers having the following characteristics:

• Diameter: 100 or 150 mm
• Device layer thickness: 5-525 μm
• BOX: thermal, PE CVD
• BOX thickness: 0.1-8.0 μm
• Edge exclusion: 3 mm
• Edge type on handle: bewelled, SEMI standard
• Edge on device: straight with corner radii on top 10 μm

We also manufacture wafers with cavities (С-SOI) having following parameters:

• Cavity depth: 5-250 μm
• Cavity wall angle: +/-0.5°
• Maximum cavity span: 20000 μm (depends on the device layer thickness)

Orders may also include SOI with double device layer, with hidden ion implantation and silicon with dielectric insulation (T-SOI), as well as with glass dielectric insulation.

Our company has experience in manufacturing microfluidic devices for chemical analysis, medicine and scientific research. We are ready to offer the following materials and technologies to our customers:

• Optical glass Borofloat 33
• Quartz
• Silicon
• SU-8
• PDMS

To discuss the possibility of manufacturing your device and to receive design rules, please, contact us via the Contacts section.

The first ever devices for which we mastered the first technological processes were MEMS. Thus we have a vast experience in this field for creating sensitive elements of sensors by using the following key technological clusters:

• Surface micromachining
• Bulk micromachining
• Wafer level packaging
• High vacuum encapsulation
• Delicate singulation

To discuss the possibility of manufacturing your item and to receive the design regulations for MEMS items, please, contact us via the Contacts section.